Verification Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: For all stages of verification on IP, including developing testbench, model, assertions/checkers/monitors, test plan & test development, regressions, and infrastructure development. THE PERSON: Strong self-driving ability Should have excellent communication skills (both written and oral) Strong problem-solving skills KEY RESPONSIBILITIES: IP new feature development and verification Building testbench, creating test plan and debugging regression Apply necessary verification methodologies to ASIC design, such as UVM, coverage, assertion, randomization, etc. to achieve the verification goals Create script to enhance verification efficiency. PREFERRED EXPERIENCE: Experience with design for verification (assertion-based design strategies, code coverage, functional coverage, test plan etc.) Familiar with PCIE. Familiar with SV/UVM. Familiar with Linux Environment. ACADEMIC CREDENTIALS: Major in EE, CS or related, Master Degree with 6+ years or Bachelor with 8+ years working experiences LOCATION: Shanghai #LI-JG2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. THE ROLE: For all stages of verification on IP, including developing testbench, model, assertions/checkers/monitors, test plan & test development, regressions, and infrastructure development. THE PERSON: Strong self-driving ability Should have excellent communication skills (both written and oral) Strong problem-solving skills KEY RESPONSIBILITIES: IP new feature development and verification Building testbench, creating test plan and debugging regression Apply necessary verification methodologies to ASIC design, such as UVM, coverage, assertion, randomization, etc. to achieve the verification goals Create script to enhance verification efficiency. PREFERRED EXPERIENCE: Experience with design for verification (assertion-based design strategies, code coverage, functional coverage, test plan etc.) Familiar with PCIE. Familiar with SV/UVM. Familiar with Linux Environment. ACADEMIC CREDENTIALS: Major in EE, CS or related, Master Degree with 6+ years or Bachelor with 8+ years working experiences LOCATION: Shanghai #LI-JG2