PMTS - Power Optimization and Modeling Engineer - AI processor at AMD

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AMD
PMTS - Power Optimization and Modeling Engineer - AI processor
Bangalore, India

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WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_




PMTS SILICON DESIGN ENGINEER

THE ROLE:

We are seeking a seasoned SoC Architect with expertise or significant interest in System Architecture. You have had significant success driving architecture, product roadmaps and product requirements. You are meticulous about Power, Performance and Area while driving schedule and managing cost. This senior role will stretch you as you lead architecture teams in new directions, network with our world-class, patent-holding think-tank, and negotiate amongst design teams, marketing, and business unit executives.

THE PERSON:

You have excellent communication and presentation skills, demonstrated through technical publications, presentations, trainings, executive briefings, etc.  You are highly adept at collaboration among top-thinkers and engineers alike, ready to mentor and guide, and help to elevate the knowledge and skills of the team around you.

 

Key responsibilities:

  • Responsible for 3 main areas, 1. Power modeling, 2. Power optimization and 3. Power correlation of cutting-edge IPs/Subsystem/SoCs across AMD family of products.
  • Come up with bottoms-up estimate and top-down target for new IP/SoC
  • Run power tools like PowerArtist and Primetime PX (PTPX) on various IPs/SoC.
  • Review power reports and identify the outliers to debug the root cause of high-power consumption blocks
  • Recommend fixes in RTL and Physical design to reduce power.
  • Provide feedback to IP teams to drive power optimization efforts throughout the project.
  • Should be a team player, eagerness to learn new technology in low power space.
  • Wherever possible come up with a new/innovative flow to simplify existing data (area vs signal-activity vs dynamic power etc..) to improve power projections.

 

Preferred Experience:

  • Familiarity with low power/power optimization concepts in front-end and back-end design
  • Familiarity with Verdi, PowerArtist tool and PrimetimePX(PTPX) tool.

 

 ACADEMIC CREDENTIALS:

  • Bachelor’s or Master’s degree in related discipline preferred

#LI-NS1




Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

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