SoC Power and Performance (PnP) Manager

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: We are seeking a highly skilled SoC Power and Performance (PnP) Manager who will also act as the Power and Performance Lead (PPL) to drive Power, and Performance Attainment (PPA), Power Management (PMM), and Product Definition Lock (PDL) for SoC programs. This role requires a technical expert and team leader who can own PPA attainment, feature validation, and performance optimization in both pre-silicon and post-silicon phases. THE PERSON: As a PnP Manager and Lead, you will collaborate with cross-functional teams, including architects, design engineers, validation teams, and marketing, to deliver industry-leading SoC solutions with optimized power efficiency and performance. KEY RESPONSIBILITIES: Post-Silicon Power, Performance, and Area (PPA) Attainment Lead post-silicon efforts to achieve PPA targets defined during the SoC planning phase. Drive silicon validation and characterization for power and performance metrics across various PVT (Process, Voltage, Temperature) corners. Optimize SoC power and performance through firmware tuning, workload analysis, and design modifications. Power Management (PMM) Ensure the validation and functionality of all PMM features, including Dynamic Voltage and Frequency Scaling (DVFS), clock/power gating, and low-power modes. Collaborate with firmware and software teams to fine-tune PMM algorithms and enable energy-efficient operation. Product Definition Lock (PDL) Act as the owner for PDL-related deliverables, ensuring alignment of SoC power and performance metrics with product requirements. Drive issue debugging and resolution for power or performance discrepancies to meet PDL milestones. Pre-Silicon PPA Planning Define detailed PPA plans and methodologies in the pre-silicon phase to ensure all PMM features are implemented and validated post-silicon. Create workload-based models to predict SoC power and performance under diverse operating conditions. Collaborate with architects and RTL teams to refine SoC power and performance features. Pre-Silicon Verification Guide and oversee power/performance simulations and modeling efforts to identify and address bottlenecks. Work closely with the design team to implement design optimizations for improved power efficiency. PREFERRED EXPERIENCE: Extensive experience in SoC power and performance engineering, including pre-silicon planning and post-silicon validation. Proven expertise in PPA optimization, silicon characterization, and workload analysis. Strong understanding of power management features such as DVFS, clock/power gating, and low-power state transitions. Proficiency in silicon debug tools and methodologies. Experience leading cross-functional teams and managing SoC programs Experience with high-performance and low-power SoC architectures. Familiarity with industry-standard simulation and validation tools. Strong communication and collaboration skills to interface with engineering, marketing, and product management teams. Demonstrated ability to deliver SoC programs on schedule while meeting power and performance goals. ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. #LI-IA1 #LI-Hybrid At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD’s Employee Stock Purchase Plan. You’ll also be eligible for competitive benefits described in more detail here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE: We are seeking a highly skilled SoC Power and Performance (PnP) Manager who will also act as the Power and Performance Lead (PPL) to drive Power, and Performance Attainment (PPA), Power Management (PMM), and Product Definition Lock (PDL) for SoC programs. This role requires a technical expert and team leader who can own PPA attainment, feature validation, and performance optimization in both pre-silicon and post-silicon phases. THE PERSON: As a PnP Manager and Lead, you will collaborate with cross-functional teams, including architects, design engineers, validation teams, and marketing, to deliver industry-leading SoC solutions with optimized power efficiency and performance. KEY RESPONSIBILITIES: Post-Silicon Power, Performance, and Area (PPA) Attainment Lead post-silicon efforts to achieve PPA targets defined during the SoC planning phase. Drive silicon validation and characterization for power and performance metrics across various PVT (Process, Voltage, Temperature) corners. Optimize SoC power and performance through firmware tuning, workload analysis, and design modifications. Power Management (PMM) Ensure the validation and functionality of all PMM features, including Dynamic Voltage and Frequency Scaling (DVFS), clock/power gating, and low-power modes. Collaborate with firmware and software teams to fine-tune PMM algorithms and enable energy-efficient operation. Product Definition Lock (PDL) Act as the owner for PDL-related deliverables, ensuring alignment of SoC power and performance metrics with product requirements. Drive issue debugging and resolution for power or performance discrepancies to meet PDL milestones. Pre-Silicon PPA Planning Define detailed PPA plans and methodologies in the pre-silicon phase to ensure all PMM features are implemented and validated post-silicon. Create workload-based models to predict SoC power and performance under diverse operating conditions. Collaborate with architects and RTL teams to refine SoC power and performance features. Pre-Silicon Verification Guide and oversee power/performance simulations and modeling efforts to identify and address bottlenecks. Work closely with the design team to implement design optimizations for improved power efficiency. PREFERRED EXPERIENCE: Extensive experience in SoC power and performance engineering, including pre-silicon planning and post-silicon validation. Proven expertise in PPA optimization, silicon characterization, and workload analysis. Strong understanding of power management features such as DVFS, clock/power gating, and low-power state transitions. Proficiency in silicon debug tools and methodologies. Experience leading cross-functional teams and managing SoC programs Experience with high-performance and low-power SoC architectures. Familiarity with industry-standard simulation and validation tools. Strong communication and collaboration skills to interface with engineering, marketing, and product management teams. Demonstrated ability to deliver SoC programs on schedule while meeting power and performance goals. ACADEMIC CREDENTIALS: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. #LI-IA1 #LI-Hybrid