MTS SOC Performance Verification Engineer

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MTS SILICON DESIGN ENGINEER 

 

 

THE ROLE: 

We are looking for a System-on-Chip Performance Verification Engineer who will be part of a team working on next generation of a complex SOC design of APU/GPU products for HPC/ML/AI applications.

 

This is a multidisciplinary function/role, working in a close collaboration with SoC/Chip leads, Architecture, SW and various design/HW teams on performance aspects of the entire chip. Our feedback is also used by HW/SW Architects to drive design and features definition for the next generation of products.

 

THE PERSON:  

• You have a passion for modern, complex processor architecture, digital design, and verification in general.
• You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
• You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES: 

• Collaborate with architects, hardware and firmware engineers to understand the new features to be verified.
• Create test plan documentation, based on use cases defined by hardware and software architects.
• Build directed and random performance verification tests.
• Debug test failures to determine the problem’s root cause.
• Work with RTL designers and SoC/IP Architects to resolve HW and configuration related performance issues.
• Analyze and review performance results with SoC/Chip leads and suggest potential solutions.

PREFERRED EXPERIENCE:  

• Proficient in IP/SoC level ASIC verification flow.
• Good understanding and hands-on experience with UVM concepts and SystemVerilog language. 
• Experienced with C/C++. 
• Scripting language experience: Perl, Python.
• Strong knowledge in Computer Architecture.
• Exposure to IP/SoC Performance Verification and/or Modeling is an asset.    
• Strong knowledge in RTL Design and Architecture. 
• Strong leadership and mentorship skills.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering or equivalent.
  
  

 

#LI-RP1

 

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

MTS SILICON DESIGN ENGINEER 

 

 

THE ROLE: 

We are looking for a System-on-Chip Performance Verification Engineer who will be part of a team working on next generation of a complex SOC design of APU/GPU products for HPC/ML/AI applications.

 

This is a multidisciplinary function/role, working in a close collaboration with SoC/Chip leads, Architecture, SW and various design/HW teams on performance aspects of the entire chip. Our feedback is also used by HW/SW Architects to drive design and features definition for the next generation of products.

 

THE PERSON:  

• You have a passion for modern, complex processor architecture, digital design, and verification in general.
• You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones.
• You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

KEY RESPONSIBILITIES: 

• Collaborate with architects, hardware and firmware engineers to understand the new features to be verified.
• Create test plan documentation, based on use cases defined by hardware and software architects.
• Build directed and random performance verification tests.
• Debug test failures to determine the problem’s root cause.
• Work with RTL designers and SoC/IP Architects to resolve HW and configuration related performance issues.
• Analyze and review performance results with SoC/Chip leads and suggest potential solutions.

PREFERRED EXPERIENCE:  

• Proficient in IP/SoC level ASIC verification flow.
• Good understanding and hands-on experience with UVM concepts and SystemVerilog language. 
• Experienced with C/C++. 
• Scripting language experience: Perl, Python.
• Strong knowledge in Computer Architecture.
• Exposure to IP/SoC Performance Verification and/or Modeling is an asset.    
• Strong knowledge in RTL Design and Architecture. 
• Strong leadership and mentorship skills.

ACADEMIC CREDENTIALS:  

• Bachelors or Masters degree in computer engineering/Electrical Engineering or equivalent.
  
  

 

#LI-RP1