ML Performance Optimization Software Engineer

Snapshot

At Google DeepMind, we've built a unique culture and work environment where long-term ambitious research can flourish. We are seeking a highly motivated and experienced ML Software Engineering Manager to join our HW-SW Co-design team and drive groundbreaking advances for machine learning acceleration.

About us

Artificial Intelligence could be one of humanity’s most useful inventions. At Google DeepMind, we’re a team of scientists, engineers, machine learning experts and more, working together to advance the state of the art in artificial intelligence. We use our technologies for widespread public benefit and scientific discovery, and collaborate with others on critical challenges, ensuring safety and ethics are the highest priority.

About you

We seek out individuals who thrive in ambiguity and who are willing to help out with whatever moves our HW-SW co-design project forward. We regularly need to invent novel solutions to problems, and often change course if our ideas don’t work out, so flexibility and adaptability to work on any project is a must. We value strong leadership, technical depth, and a collaborative spirit.

The Role

We are seeking a talented and highly motivated ML Software Engineering Manager to join our GenAI technical infrastructure research team. You will lead a multi-disciplinary team to evolve the software side of our hw-sw co-design project. This role requires a blend of deep technical expertise, strategic thinking, and strong leadership.

Responsibilities:

• Lead the work of multi-disciplinary ML software engineers, including numerics, performance optimisation, teacher-student learning, and novel model architecture exploration.
• Closely collaborate with our hardware team to define and drive strategy for next-generation machine learning accelerators.
• Manage relationships and technical execution across a virtual team that spans both Google and outside partners.
• Drive the team to deliver high-quality aligned to tight schedules.

Minimum Qualifications:

• Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
• 10+ years of experience in ASIC design and development.
• Proven track record of technical leadership and successfully delivering complex silicon projects (tape-outs) to production.
• Deep expertise in at least one core silicon discipline (e.g., RTL, PD, DV) and strong familiarity with the entire ASIC flow.
• Experience with managing silicon vendors and other external partners.

Preferred Qualifications:

• Master's or Ph.D. in a related field.
• Experience leading and managing teams across the full silicon development cycle, from RTL to bringup.
• Experience with high-performance compute IPs (e.g., GPUs, ML accelerators).
• Knowledge of high-performance and low-power architectures for ML acceleration.
• Excellent communication, and leadership skills.