Fellow AI Compiler Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: AMD is looking for an engineering leader passionate about driving compiler innovation to unlock the performance of our data center GPU platforms for AI applications. The ideal candidate will have proven experience delivering industry-leading compiler optimizations and compiler infrastructure that others can build on top. In this role, the candidate will be responsible for setting the technical direction, driving the highest-impact optimizations, mentoring senior staff, and ensuring the compiler toolchain delivers world-class performance, correctness, and stability. This is a critical role that directly impacts the performance ceiling of our entire platform. THE PERSON: The ideal candidate should have demonstrated experience in code generation and optimization, possessing an exceptional ability to translate complex architectural features into world-class backend implementations. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Part of AMD’s AI team focused on improving the compiler infrastructure of current products and developing new groundbreaking AMD technologies in the broader compiler space Design, implement, and tune sophisticated LLVM backend passes, focusing on low-level optimizations like instruction selection, register allocation, instruction scheduling, software pipelining, and memory access transformations. Drive the design and implementation of new code generation infrastructure, potentially including custom LLVM components for new or evolving hardware. Partner closely with Hardware Design, Architecture, Software Runtime, and Kernel/Driver teams on hardware/software co-design efforts to maximize the performance of the overall stack. Represent the company in the open-source LLVM community, contributing patches, participating in design discussions, and driving key feature integration upstream where applicable. PREFERRED EXPERIENCE: Strong background in computer architecture and software engineering practices Experience designing and working with compiler backends Active contribution history to the open-source LLVM project Demonstrated mastery of LLVM backend components, including LLVM IR, Machine IR (MIR), SelectionDAG, GlobalISel, Register Allocation, TableGen, and Instruction Scheduling Effective communication and problem-solving skills ACADEMIC CREDENTIALS: Master’s or Ph.D. in Computer Science, Computer Engineering, or a related field, with multiple years of professional experience in compiler development, with a significant focus on LLVM or other modern compiler backend LOCATION: San Jose CA #LI-G11 #LI-HYBRID #LI-MH2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

THE ROLE: AMD is looking for an engineering leader passionate about driving compiler innovation to unlock the performance of our data center GPU platforms for AI applications. The ideal candidate will have proven experience delivering industry-leading compiler optimizations and compiler infrastructure that others can build on top. In this role, the candidate will be responsible for setting the technical direction, driving the highest-impact optimizations, mentoring senior staff, and ensuring the compiler toolchain delivers world-class performance, correctness, and stability. This is a critical role that directly impacts the performance ceiling of our entire platform. THE PERSON: The ideal candidate should have demonstrated experience in code generation and optimization, possessing an exceptional ability to translate complex architectural features into world-class backend implementations. Able to communicate effectively and work optimally with different teams across AMD. KEY RESPONSIBILITIES: Part of AMD’s AI team focused on improving the compiler infrastructure of current products and developing new groundbreaking AMD technologies in the broader compiler space Design, implement, and tune sophisticated LLVM backend passes, focusing on low-level optimizations like instruction selection, register allocation, instruction scheduling, software pipelining, and memory access transformations. Drive the design and implementation of new code generation infrastructure, potentially including custom LLVM components for new or evolving hardware. Partner closely with Hardware Design, Architecture, Software Runtime, and Kernel/Driver teams on hardware/software co-design efforts to maximize the performance of the overall stack. Represent the company in the open-source LLVM community, contributing patches, participating in design discussions, and driving key feature integration upstream where applicable. PREFERRED EXPERIENCE: Strong background in computer architecture and software engineering practices Experience designing and working with compiler backends Active contribution history to the open-source LLVM project Demonstrated mastery of LLVM backend components, including LLVM IR, Machine IR (MIR), SelectionDAG, GlobalISel, Register Allocation, TableGen, and Instruction Scheduling Effective communication and problem-solving skills ACADEMIC CREDENTIALS: Master’s or Ph.D. in Computer Science, Computer Engineering, or a related field, with multiple years of professional experience in compiler development, with a significant focus on LLVM or other modern compiler backend LOCATION: San Jose CA #LI-G11 #LI-HYBRID #LI-MH2