Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_   THE ROLE: As a member of the Radeon Technologies Group, you will help bring to life cutting-edge designs. As a member of the Physical Design team, you will work closely with the architecture, IP design, front-end design/integration teams, and product engineers to achieve first pass silicon success. THE PERSON: A successful candidate will work with senior silicon design engineers. The candidate will be highly accurate and detail-oriented, possessing good communication and problem-solving skills. KEY RESPONSIBLITIES: Bring deep knowledge and experience in Physical design and apply them to large, challenging, leading-edge designs to ensure high quality on time delivery. Understanding of Full-chip Floorplan, architecture and work with the team to drive floorplan related activities. Handle complex partitions, TSV, advanced process node rules. Technically lead different aspects of Physical Design including Chip Level Floor planning, Bus / Pin Planning, repeaters, feedthroughs. Coordinate with STA, EMIR and Physical verification teams to drive floorplan changes. Bring significant experience in effective team leadership to help mentor, coach and grow the RTG Physical Design Team with an emphasis on positive influence on team morale and cultureExperience and understanding of flow development and scripting. Strong analytical and problem solving skills. PREFERRED EXPERIENCE: Experience in ASIC Physical Design in latest process nodes. Working experience on CAD tools from Synopsys, Cadence and Mentor Graphics required. Must be a self-starter and able to independently and efficiently drive challenging and time critical tasks to on-time completion. Understand of Fullchip Floorplan and architecture and work with the team to drive floorplan related activities. Handle complex paritions, TSV, advanced process node rules. Understanding of Place & route, Timing Analysis, clock tree distribution, Physical Verification, Chip Integration. Experience with tcl/Perl/Shell scripting. ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering/Electrical Engineering #LI-PA1 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.