Senior Staff – AI Compiler Engineer (NPU)

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. The Role We are seeking a highly skilled and motivated compiler engineer to drive the development of AMD’s next-generation compiler stack for Neural Processing Units (NPUs). This is a hands-on technical role where you will drive architectural decisions and contribute directly to the implementation of novel compiler optimizations and fusion techniques. In this role, you’ll be working at the intersection of AI and systems, shaping the future of high-performance AI workloads on AMD hardware. You will collaborate with a team of talented engineers to deliver a highly performant compiler for cutting-edge AI and NPU devices, with an emphasis on front-end compiler development and overall compiler flow understanding to inform sound architectural decisions. Key Responsibilities Design and develop the compiler stack for AMD’s NPU architecture, focusing on front-end compiler components while maintaining an end-to-end view of the compilation flow. Implement advanced graph fusion and optimization techniques to maximize performance for AI workloads on the NPU. Collaborate with hardware architects and ML framework teams (PyTorch, ONNX runtime, etc.) to co-design compiler features that align with hardware capabilities. Drive performance analysis and tuning of compiled machine learning models and benchmarks. Contribute to the evolution of MLIR- and LLVM-based infrastructure. Debug and resolve compiler issues across the software stack. Mentor and guide junior engineers, fostering a culture of technical excellence and knowledge sharing. Required Qualifications 10+ years of experience in compiler development or a closely related software systems field. Strong programming skills in C++ and proficiency in Python. Deep understanding of compiler internals – including front-end parsing, IR design, optimization passes, and back-end code generation. Hands-on experience with LLVM and MLIR compiler frameworks. Familiarity with machine learning frameworks and models (e.g., ONNX, PyTorch/TorchScript). Proven experience in performance tuning and low-level optimization. Strong debugging and problem-solving abilities in complex systems software. Excellent communication and teamwork skills. Preferred Qualifications Experience with AI accelerator architectures such as NPUs, GPUs, or DSPs. Contributions to open-source compiler or machine learning projects (e.g., LLVM, MLIR, TVM, TensorFlow XLA). Background in machine learning or numerical computing. Experience designing or working with domain-specific languages (DSLs). Familiarity with modern software development tools and workflows (Git, CI/CD, profilers, debuggers). Education Bachelor’s, Master’s, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field. A strong theoretical foundation in compiler construction and computer architecture is highly desirable. #LI-TC1 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

The Role We are seeking a highly skilled and motivated compiler engineer to drive the development of AMD’s next-generation compiler stack for Neural Processing Units (NPUs). This is a hands-on technical role where you will drive architectural decisions and contribute directly to the implementation of novel compiler optimizations and fusion techniques. In this role, you’ll be working at the intersection of AI and systems, shaping the future of high-performance AI workloads on AMD hardware. You will collaborate with a team of talented engineers to deliver a highly performant compiler for cutting-edge AI and NPU devices, with an emphasis on front-end compiler development and overall compiler flow understanding to inform sound architectural decisions. Key Responsibilities Design and develop the compiler stack for AMD’s NPU architecture, focusing on front-end compiler components while maintaining an end-to-end view of the compilation flow. Implement advanced graph fusion and optimization techniques to maximize performance for AI workloads on the NPU. Collaborate with hardware architects and ML framework teams (PyTorch, ONNX runtime, etc.) to co-design compiler features that align with hardware capabilities. Drive performance analysis and tuning of compiled machine learning models and benchmarks. Contribute to the evolution of MLIR- and LLVM-based infrastructure. Debug and resolve compiler issues across the software stack. Mentor and guide junior engineers, fostering a culture of technical excellence and knowledge sharing. Required Qualifications 10+ years of experience in compiler development or a closely related software systems field. Strong programming skills in C++ and proficiency in Python. Deep understanding of compiler internals – including front-end parsing, IR design, optimization passes, and back-end code generation. Hands-on experience with LLVM and MLIR compiler frameworks. Familiarity with machine learning frameworks and models (e.g., ONNX, PyTorch/TorchScript). Proven experience in performance tuning and low-level optimization. Strong debugging and problem-solving abilities in complex systems software. Excellent communication and teamwork skills. Preferred Qualifications Experience with AI accelerator architectures such as NPUs, GPUs, or DSPs. Contributions to open-source compiler or machine learning projects (e.g., LLVM, MLIR, TVM, TensorFlow XLA). Background in machine learning or numerical computing. Experience designing or working with domain-specific languages (DSLs). Familiarity with modern software development tools and workflows (Git, CI/CD, profilers, debuggers). Education Bachelor’s, Master’s, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related field. A strong theoretical foundation in compiler construction and computer architecture is highly desirable. #LI-TC1 #LI-HYBRID