Product Development Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: Test Engineering is a cost, quality, and time-to-market driven team responsible for enabling the availability of microprocessors to our customers. Pre-silicon responsibilities for the Test Engineer include understanding product features, developing characterization test plans, highlighting test coverage holes, and developing software and hardware infrastructure to execute those plans. This requires interaction with Design and Platform Engineering and allows for the opportunity to provide test enhancement feedback for future designs. Post-silicon responsibilities include microprocessor debug & analysis and the execution of characterization plans. This may include silicon performance issues, yield issues, manufacturing processes, and device marginalities. The Test Engineer will work closely with Design and Platform Engineering to root cause issues that result from the debug, characterization and margin analysis. The Test Engineer will also provide datasheet specifications and drive improvements in yield. KEY RESPONSIBILITIES: Position includes test planning, test creation, characterization, data analysis, and silicon debug of microprocessors in leading edge process technologies. Includes: Development and debug of ATE test patterns and test flows Ensuring device testability and manufacturability from development through production Optimization of test flows for increased quality and cost improvement Analysis of part failures leading to test flow improvement Characterization and debug of new silicon designs and process technologies Analysis of characterization data PREFERRED EXPERIENCE: Scan/ATPG Applicant should be familiar with scan hardware compressions, failure mechanisms and debug processes AC scan (at-speed) development, debug, test and characterization Array Applicant should be familiar with modern SRAM cell operation. SRAM debug, characterization, test or design knowledge Memory BIST engine knowledge Analog/Mixed Signal Applicant should be familiar with modern microprocessor architecture and analog DFT Automated Test Equipment (ATE) platform Verigy 93K Applicant familiar with tester infrastructure including HW, SW, timing, levels, patterns Test methodologies for OpenShorts/BoundaryScan and other connectivity-based testing. Strong communication skills including data presentation Java, Perl, C++ coding skills ATE test experience Unix proficiency Modern computer architecture knowledge ATE test program knowledge JTAG knowledge ACADEMIC CREDENTIALS: BS/MS EE or equivalent LOCATION: Austin, TX #LI-TW2 #LI-HYBRID Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE: Test Engineering is a cost, quality, and time-to-market driven team responsible for enabling the availability of microprocessors to our customers. Pre-silicon responsibilities for the Test Engineer include understanding product features, developing characterization test plans, highlighting test coverage holes, and developing software and hardware infrastructure to execute those plans. This requires interaction with Design and Platform Engineering and allows for the opportunity to provide test enhancement feedback for future designs. Post-silicon responsibilities include microprocessor debug & analysis and the execution of characterization plans. This may include silicon performance issues, yield issues, manufacturing processes, and device marginalities. The Test Engineer will work closely with Design and Platform Engineering to root cause issues that result from the debug, characterization and margin analysis. The Test Engineer will also provide datasheet specifications and drive improvements in yield. KEY RESPONSIBILITIES: Position includes test planning, test creation, characterization, data analysis, and silicon debug of microprocessors in leading edge process technologies. Includes: Development and debug of ATE test patterns and test flows Ensuring device testability and manufacturability from development through production Optimization of test flows for increased quality and cost improvement Analysis of part failures leading to test flow improvement Characterization and debug of new silicon designs and process technologies Analysis of characterization data PREFERRED EXPERIENCE: Scan/ATPG Applicant should be familiar with scan hardware compressions, failure mechanisms and debug processes AC scan (at-speed) development, debug, test and characterization Array Applicant should be familiar with modern SRAM cell operation. SRAM debug, characterization, test or design knowledge Memory BIST engine knowledge Analog/Mixed Signal Applicant should be familiar with modern microprocessor architecture and analog DFT Automated Test Equipment (ATE) platform Verigy 93K Applicant familiar with tester infrastructure including HW, SW, timing, levels, patterns Test methodologies for OpenShorts/BoundaryScan and other connectivity-based testing. Strong communication skills including data presentation Java, Perl, C++ coding skills ATE test experience Unix proficiency Modern computer architecture knowledge ATE test program knowledge JTAG knowledge ACADEMIC CREDENTIALS: BS/MS EE or equivalent LOCATION: Austin, TX #LI-TW2 #LI-HYBRID