PMTS Silicon Design Engineer

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We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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PMTS SILICON DESIGN ENGINEER

THE ROLE: 

As part of Circuits and Technology group, the ideal candidate will get to work on design of complex high speed Analog Mixed Signal IPs (with significant Digital and Analog content) that are delivered to various AMD SoCs.

Responsibility:

Design and develop RTL code for DDR blocks in Verilog HDL and make sure they are functionally correct and reusable for different configurations based on architectural requirements.
Conduct design reviews of designs in technical presentations to peers and management
Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure.
Work with Design Verification team to ensure quality for architecture definition and design implementation.

Requirement:

MS or BS in Electrical Engineering/Computer Engineering/ Computer Science with 15+ years working experience in ASIC design industry. 
Knowledge in computer architecture and interconnects.
Experience in high speed IO controller design (e.g. DDR, USB, PCIe, SATA, Ethernet). DDR experience is plus.
Experience in full ASIC design cycle: Understanding spec requirement, RTL, design verification, floor-planning, synthesis, timing closure, power intent, post-silicon validation
Expert on Verilog RTL design and has experience of large digital ASIC project.
Familiar with front-end EDA tools and flows.
Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.)
Excellent interpersonal, communication, and writing skills.  Able to provide clear and logical presentations and documentation.  Has an open mind and attitude.  Transparent.  Willing to admit and learn from mistakes.
Works well with others in a team environment
Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as committed milestones. 

#LI-ST1

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

PMTS SILICON DESIGN ENGINEER

THE ROLE: 

As part of Circuits and Technology group, the ideal candidate will get to work on design of complex high speed Analog Mixed Signal IPs (with significant Digital and Analog content) that are delivered to various AMD SoCs.

Responsibility:

Design and develop RTL code for DDR blocks in Verilog HDL and make sure they are functionally correct and reusable for different configurations based on architectural requirements.
Conduct design reviews of designs in technical presentations to peers and management
Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist physical design team on the floor-planning and timing closure.
Work with Design Verification team to ensure quality for architecture definition and design implementation.

Requirement:

MS or BS in Electrical Engineering/Computer Engineering/ Computer Science with 15+ years working experience in ASIC design industry. 
Knowledge in computer architecture and interconnects.
Experience in high speed IO controller design (e.g. DDR, USB, PCIe, SATA, Ethernet). DDR experience is plus.
Experience in full ASIC design cycle: Understanding spec requirement, RTL, design verification, floor-planning, synthesis, timing closure, power intent, post-silicon validation
Expert on Verilog RTL design and has experience of large digital ASIC project.
Familiar with front-end EDA tools and flows.
Familiar with Unix/Linux and scripts (tcl, perl, ruby and etc.)
Excellent interpersonal, communication, and writing skills.  Able to provide clear and logical presentations and documentation.  Has an open mind and attitude.  Transparent.  Willing to admit and learn from mistakes.
Works well with others in a team environment
Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as committed milestones. 

#LI-ST1