PMTS Silicon Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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PMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the SOC team, you will help bring to life cutting-edge designs. As a member of the front-end design verification team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

 

KEY RESPONSIBILITIES:

·       Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified

·       Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases

·       Estimate the time required to write the new feature tests and any required changes to the test environment

·       Build the directed and random verification tests

·       Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

·       Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

 

PREFERRED EXPERIENCE:

·       Proficient in IP/Sub-System/SOC level ASIC verification with 15 + Years of experience.

·       Proficient in debugging firmware and RTL code using simulation tools

·       Proficient in using UVM testbenches and working in Linux and Windows environments

·       Experienced with Verilog, System Verilog, C, and C++

·       Processor Micro-Architecture concepts – Reset/Boot-flow/Cache Coherency/Interrupt flows knowledge

·       Developing UVM based verification frameworks and testbenches, processes and flows

·       Automating workflows in a distributed compute environment.

·       Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process

·       Strong background in the C++ language, preferably on Linux with exposure to Windows platform

·       Good understanding and hands-on experience in the UVM concepts and SystemVerilog language

·       Good working knowledge of SystemC and TLM with some related experience.

·       Scripting language experience: Perl, Ruby, Makefile, shell preferred.

·       Exposure to leadership or mentorship is an asset

·       Desirable assets with prior exposure to video codec system or other multimedia solutions.

 

 

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-SR5

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

PMTS SILICON DESIGN ENGINEER

THE ROLE: 

As a member of the SOC team, you will help bring to life cutting-edge designs. As a member of the front-end design verification team, you will work closely with the architecture, IP design, Physical Design teams, and product engineers to achieve first pass silicon success.

THE PERSON:

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.

 

KEY RESPONSIBILITIES:

·       Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified

·       Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases

·       Estimate the time required to write the new feature tests and any required changes to the test environment

·       Build the directed and random verification tests

·       Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues

·       Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements

 

PREFERRED EXPERIENCE:

·       Proficient in IP/Sub-System/SOC level ASIC verification with 15 + Years of experience.

·       Proficient in debugging firmware and RTL code using simulation tools

·       Proficient in using UVM testbenches and working in Linux and Windows environments

·       Experienced with Verilog, System Verilog, C, and C++

·       Processor Micro-Architecture concepts – Reset/Boot-flow/Cache Coherency/Interrupt flows knowledge

·       Developing UVM based verification frameworks and testbenches, processes and flows

·       Automating workflows in a distributed compute environment.

·       Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process

·       Strong background in the C++ language, preferably on Linux with exposure to Windows platform

·       Good understanding and hands-on experience in the UVM concepts and SystemVerilog language

·       Good working knowledge of SystemC and TLM with some related experience.

·       Scripting language experience: Perl, Ruby, Makefile, shell preferred.

·       Exposure to leadership or mentorship is an asset

·       Desirable assets with prior exposure to video codec system or other multimedia solutions.

 

 

ACADEMIC CREDENTIALS:

• Bachelors or Masters degree in computer engineering/Electrical Engineering 
• #LI-SR5