MTS Software Development Eng.

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_

MTS SOFTWARE DEVELOPMENT ENGINEER - PERFORMANCE ARCHITECT

THE ROLE: 

Performance modelling and evaluation of ACAP workloads to eliminate bottlenecks as early as possible and guide the architecture of future generation devices. This is a challenging role in the FPGA Silicon Architecture Group in AECG business unit of AMD in Hyderabad.

ABOUT THE TEAM:

AECG group in AMD designs cutting edge FPGAs and Adaptable SOCs consisting of processor subsystems and associated peripherals, programmable fabric, memory controllers, I/O interfaces and interconnect. 

KEY RESPONSIBILITIES: 

• Modelling and simulation of workload dataflow networks and clock accurate SOC components.
• Quick prototyping, long-term design decisions, and exploring novel architectures
• Enhancement of the existing tools and knowledgebase
• Collaborating with architects in the development of next generation devices
• Collaborating with customer facing teams to identify scope of optimization for future market scenarios
• Breaking down system level designs into simpler dataflow models and identify bottlenecks, capture memory and communication overheads
• Knowledge sharing with teammates through thorough documentation

PREFERRED EXPERIENCE: 

• Proficiency in programming in C++, Python
• Experience in developing clock accurate models and analytical models of dataflows.
• Strong background in Computer architecture, Hardware performance metrics and bottlenecks.
• Experience in performance profiling, creating experiments to address various use-cases and doing design space exploration.
• Good to have experience of creation of designs for ACAP devices in RTL or HLS.
• Good communication skills

ACADEMIC CREDENTIALS: 

• B.Tech/M.Tech/PhD in Electrical/Computer Engineering, Computer Science or related fields, with appropriate prior experience

#LI-SG

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

MTS SOFTWARE DEVELOPMENT ENGINEER - PERFORMANCE ARCHITECT

THE ROLE: 

Performance modelling and evaluation of ACAP workloads to eliminate bottlenecks as early as possible and guide the architecture of future generation devices. This is a challenging role in the FPGA Silicon Architecture Group in AECG business unit of AMD in Hyderabad.

ABOUT THE TEAM:

AECG group in AMD designs cutting edge FPGAs and Adaptable SOCs consisting of processor subsystems and associated peripherals, programmable fabric, memory controllers, I/O interfaces and interconnect. 

KEY RESPONSIBILITIES: 

• Modelling and simulation of workload dataflow networks and clock accurate SOC components.
• Quick prototyping, long-term design decisions, and exploring novel architectures
• Enhancement of the existing tools and knowledgebase
• Collaborating with architects in the development of next generation devices
• Collaborating with customer facing teams to identify scope of optimization for future market scenarios
• Breaking down system level designs into simpler dataflow models and identify bottlenecks, capture memory and communication overheads
• Knowledge sharing with teammates through thorough documentation

PREFERRED EXPERIENCE: 

• Proficiency in programming in C++, Python
• Experience in developing clock accurate models and analytical models of dataflows.
• Strong background in Computer architecture, Hardware performance metrics and bottlenecks.
• Experience in performance profiling, creating experiments to address various use-cases and doing design space exploration.
• Good to have experience of creation of designs for ACAP devices in RTL or HLS.
• Good communication skills

ACADEMIC CREDENTIALS: 

• B.Tech/M.Tech/PhD in Electrical/Computer Engineering, Computer Science or related fields, with appropriate prior experience

#LI-SG