CPU Power Architect

We are seeking a highly skilled CPU Power Architect to drive power efficiency and optimization for next-generation processor designs. This role involves defining power architectures, modeling power consumption, optimizing power management techniques, and collaborating with cross-functional teams to deliver industry-leading power efficiency.

This role is Remote, based out of The United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

 

Responsibilities:

• Define and drive power architecture for high-performance CPU cores and SoCs.
• Develop and refine power models to predict and analyze power consumption across various workloads.
• Collaborate with microarchitecture, circuit design, and software teams to optimize power efficiency at all levels.
• Implement advanced power management techniques, including dynamic voltage/frequency scaling (DVFS), power gating, and workload-based optimizations.
• Evaluate trade-offs between performance, power, and area (PPA) for CPU designs.
• Conduct power/performance simulations and provide architectural guidance for reducing energy consumption.
• Develop methodologies and tools for power analysis, modeling, and verification.
• Stay up to date with industry trends in low-power design, power-aware computing, and energy-efficient architectures.
• Work closely with silicon implementation teams to ensure power-efficient design practices are followed through tape-out.

 

Experience & Qualifications:

• Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Computer Engineering, or a related field.
• 5+ years of experience in CPU/SoC power architecture, microarchitecture, or low-power design.
• Deep understanding of CPU architectures, pipelines, and power management techniques.
• Experience with power modeling tools, simulation frameworks, and power/performance trade-off analysis.
• Proficiency in power optimization methodologies at different levels (architecture, RTL, circuit).
• Strong knowledge of power reduction techniques such as clock gating, power gating, and dynamic voltage scaling.
• Familiarity with industry-standard tools for power analysis (e.g., PrimeTime PX, PowerArtist, Joules).
• Hands-on experience with scripting (Python, Perl, or TCL) and programming languages (C, C++).
• Excellent problem-solving skills and ability to work in a fast-paced, collaborative environment.
• Experience in AI/ML-driven power optimization.
• Knowledge of emerging low-power design trends in mobile, server, or edge computing.
• Experience with RTL design and verification methodologies.
• Familiarity with firmware and operating system power management strategies.

 

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

Due to U.S. Export Control laws and regulations, Tenstorrent is required to ensure compliance with licensing regulations when transferring technology to nationals of certain countries that have been licensing conditions set  by the U.S. government.

Our engineering positions and certain engineering support positions require access to information, systems, or technologies that are subject to U.S. Export Control laws and regulations, please note that citizenship/permanent residency, asylee and refugee information and/or documentation will be required and considered as Tenstorrent moves through the employment process.

If a U.S. export license is required, employment will not begin until a license with acceptable conditions is granted by the U.S. government.  If a U.S. export license with acceptable conditions is not granted by the U.S. government, then the offer of employment will be rescinded.