Analog Design Engineer

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world’s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ THE ROLE: AMD SERDES Technology Group develops high-performance electrical and optical transceiver PHYs in advanced PDKs. We are seeking electrical/optical PHY micro-architect to join our world-class team. THE PERSON: The ideal candidate will have a background in electrical/optical PHY micro-architect. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion. KEY RESPONSIBILITIES: PMA micro-architecture definition, implementation, and verification: clock generation and distribution, data path, DSP, CDR, calibration & adaptation loops Top-level and block-level electrical/optical link budgeting and modeling Circuit design of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializers, etc.) Conducting peer reviews of design and verification results Working with validation team to bring up silicon and evaluate silicon results Mentoring junior engineers in implementation tasks to ensure compliance to specification, quality standards, and milestones PREFERRED EXPERIENCE: The successful candidate will have extensive design experience in both optical and electrical transceiver design Expert level experience in circuit block and link level modeling Experience in advanced PDK design ACADEMIC CREDENTIALS: PhD in Electrical Engineering or related fields or M.S. with relevant experience with extensive design experience in both optical and electrical transceiver design LOCATION: San Jose, California #LI-TB2 Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
Benefits offered are described: AMD benefits at a glance. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.
THE ROLE: AMD SERDES Technology Group develops high-performance electrical and optical transceiver PHYs in advanced PDKs. We are seeking electrical/optical PHY micro-architect to join our world-class team. THE PERSON: The ideal candidate will have a background in electrical/optical PHY micro-architect. He/she needs to be a self-starter who collaborates well with team members and customers alike to successfully drive tasks to completion. KEY RESPONSIBILITIES: PMA micro-architecture definition, implementation, and verification: clock generation and distribution, data path, DSP, CDR, calibration & adaptation loops Top-level and block-level electrical/optical link budgeting and modeling Circuit design of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end, transmitter front-end, serializer, deserializers, etc.) Conducting peer reviews of design and verification results Working with validation team to bring up silicon and evaluate silicon results Mentoring junior engineers in implementation tasks to ensure compliance to specification, quality standards, and milestones PREFERRED EXPERIENCE: The successful candidate will have extensive design experience in both optical and electrical transceiver design Expert level experience in circuit block and link level modeling Experience in advanced PDK design ACADEMIC CREDENTIALS: PhD in Electrical Engineering or related fields or M.S. with relevant experience with extensive design experience in both optical and electrical transceiver design LOCATION: San Jose, California #LI-TB2